Time Duration Speaker & Affiliation Talk Details
09:15 AM 15 Mins Welcome and Inauguration
09:30 AM 45 Mins Dr. Harald Gossner
(Intel, Germany)
The Picosecond Challenge in CDM Testing – endangering ESD Robustness of Highspeed Interfaces (Keynote)
10:15 AM 45 Mins Prof. Elyse Rosenbaum
(UIUC, USA)
ESD Design for High-speed Wireline IOs in Advanced CMOS Technologies (Keynote)
11:00 AM 30 Mins Break Break
11:30 AM 30 Mins Mr. Mototsugu Okushima
(Renesas Electronics, Japan)
Efficient CDM Protection Design for Cross Power Domain of Analog/RF block in Finfet Technology (Invited)
12:00 PM 30 Mins Dr. Teruo Suzuki
(Socionext Inc., Japan)
Consideration based on ESD applied waveform in High-Speed IF using T-Coil (Invited)
12:30 PM 30 Mins Dr. Dolphin Abessolo Bidzo
(NXP Semiconductors, The Netherlands)
Electronic Design Automation (EDA) Layout Verification Methodology for Charged Device Model (CDM) (Invited)
01:00 PM 90 Mins Networking Lunch Networking Lunch
02:30 PM 30 Mins Dr. Hossam Sarhan
(Siemens, USA)
Ensuring Sign-off Design Reliability: Navigating Complex Requirements using Calibre® PERC™
03:00 PM 30 Mins Mitesh Goyal
(Indian Institute of Science)
Load-line Dependent Current Filament Dynamics in Nanoscale SCR Devices (PhD Talk)
03:30 PM 30 Mins Mohammad Ateeb Munshi
(Indian Institute of Science)
Understanding Temperature Dependence of ESD Reliability in AlGaN/GaN HEMTs (PhD Talk)
04:00 PM 30 Mins Rasik Rashid Malik
(Indian Institute of Science)
Interplay of Surface Passivation and Electric Field Distribution in Determining ESD Behaviour of p-GaN Gated AlGaN/GaN HEMTs (PhD Talk)
04:30 PM 30 Mins Coffee Break Coffee Break
05:00 PM 60 Mins Moderator:
Prof. Mayank Shrivastava
(Indian Institute of Science)
Panel Session: Semiconductor Advancements & Growing ESD Challenges
06:00 PM 90 Mins Poster Session
07:30 PM 120 Mins Chair's Reception & Dinner
Time Duration Speaker & Affiliation Talk Details
09:00 AM 45 Mins Dr. Gianluca Boselli
(Texas Instruments, USA)
System-Level ESD design challenges in HV Automotive Applications: process, IP and system co-design perspective (Keynote)
09:45 AM 45 Mins Dr. Charvaka Duvvury
(iT2 Technologies, USA)
Exploring Machine Learning for ESD Data Analysis (Keynote)
10:30 AM 20 Mins Prof. Mayank Shrivastava
(Indian Institute of Science)
Predictive TCAD-Based ESD Design without Foundry Data
10:50 AM 10 Mins Mr. Sharath B N
(COMSOL)
Multiphysics Simulation for the Semiconductor Industry
11:00 AM 30 Mins Break Break
11:30 AM 30 Mins Dr. Matteo Buffolo
(University of Padova, Italy)
Robustness of GaN-based LED against EOS events and ESDs (Invited)
12:00 PM 30 Mins Ms. Yang Yanjing
(ThermoFisher Scientific, Singapore)
Failure Analysis workflow for Advanced Packing and Power Semiconductor Device (Invited)
12:30 PM 30 Mins Mr. Christopher Almeras
(Raytheon, USA)
Risk Mitigation in Manufacturing of High Reliability Product (Invited)
01:00 PM 90 Mins Networking Lunch Networking Lunch
02:30 PM 30 Mins Prof. David Pommerenke
(Technical University Graz, Austria)
System Efficient ESD Design
03:00 PM 30 Mins Dr. Kranthi Nagothu
(Texas Instruments, USA/India)
On-chip protection Design Challenges for system level ESD (Invited)
03:30 PM 30 Mins Monishmurali M
(Texas Instruments)
Addressing design challenges for current uniformity in Fin-based SCRs (PhD Talk)
04:00 PM 30 Mins Dr. Charvaka Duvvury
(iT2 Technologies, USA)
Green ESD: Efficient Test Methods to Save Time and Effort During Qualification
04:30 PM 30 Mins Coffee Break Coffee Break
05:00 PM 15 Mins Anamika Chowdhury
(Lam Research)
Low Pressure Reactor Design to Avoid Unwanted Electrostatic Discharge
05:15 PM 15 Mins Anurag Mittal
(Synopsys, India)
I/O ESD implementation for 2.5D/3D Applications(Contributed)
05:30 PM 15 Mins Chinmayee Panigarhi
(NXP Semiconductors)
Challenges in ESD protection for High-Speed CML transmitter having thin oxide devices and their solution (Contributed)
05:45 PM 15 Mins Dattatreya Prabhu Rachakonda
(GlobalFoundries, India)
Learnings from Switch Self-Protection: From models to hardware (Contributed)
06:00 PM 15 Mins Harshit Dhakad
(Intel Technologies India Pvt.)
Tracing and debugging of ESD failures in a module assembly line (Contributed)
06:15 PM 15 Mins Gopikrishna Siddula
(Western Digital, India)
Enhancing Reliability in High speed and High-Density Storage: Practical Strategies for Mitigating Electrostatic Discharge (ESD) (Contributed)
06:30 PM 15 Mins Manohar Seetharam
(Samsung, India)
ESD design challenges and solutions for Mphy G5 transceiver design in 2/3nm (Contributed)
06:45 PM 30 Mins Networking, Poster and Hi-tea
07:15 PM 15 Mins Concluding remarks, Vote of thanks & 6th InEW Announcement