Topics of Interest

1. Advanced CMOS: FinFET, Nanowires, Nanosheets, etc.

ESD Issues in Advanced Technologies (Multi-gate, FinFET, SOI, SiGe, nanowire, etc.), On-Chip ESD Protection Devices & Techniques in Advanced CMOS Technologies, IC Design and Layout Issues, Circuit Simulation of EOS/ESD Events in Advanced CMOS Technologies, DC/Transient Latch-up Issues and Solutions.

2. Emerging Technologies: 2D, RRAM, Neuromorphic Devices, Quantum, etc.

ESD issues in novel devices with 2D layered semiconductor or dielectric materials, logic and memory devices, neuromorphic devices, quantum devices and quantum enhanced technologies.

3. 2.5D & 3D Stacking, TSV, Backside Power Delivery Network

ESD Issues and solutions in 2.5D & 3D IC packaging and integration, interconnects, TSV, ESD protection requirements in Backside Power Delivery Network.

4. Analog & Automotive Technologies: Bipolar, RF, High Voltage, and BCD

ESD Issues, on-chip ESD protection devices and techniques, IC Design and layout issues, ESD circuit simulation and co-design, DC/Transient Latch-up Issues and Solutions in Bipolar, RF, High Voltage, and BCD Technologies.

5. ESD Testing

ESD Testing trends with Technology Scaling, Multi-dimensional packaging, ESD Test and Characterization method, Traditional and Novel TLP Testing System, HBM and CDM testing issues and solutions, Reliability Test equipment,New failure mechanism, Advance failure analysis techniques, ESD Checking and verification Technology.

6. ESD Device & System Modelling

System level Test, modeling and simulation method, Circuit level design and simulation of ESD Events in Advanced CMOS Technologies, Use of EDA tools, IC Design and Layout issues, Transient ESD induced upset, Robustness evaluation for standard test boards,Large scale analysis with machine and deep learning.

7. Numerical Modeling and Simulation of ESD Components

Component level ESD design including but not limited to SCR, LDMOS, GGNMOS, GDPMOS, Diode, etc., TCAD/Circuit Simulation, Numerical modeling and Physics od ESD events, Advance simulation technologies (SOI, SiGe, FinFET, Compound, Nanowire),Latchup detection prevention and mitigation, Simulation tools and methodology.

8. ESD CAD & Verification

ESD modeling, design guidelines, testing standards, whole chip ESD protection, design verification, compliance testing, ESD Protection for mixed voltage applications.

9. System Level ESD

System efficient ESD design (SEED), ESD testing standards (IEC), co-design methodology of on-board and on-chip ESD protection, ESD protection for consumer electronics, automotive, aerospace and industrial applications, Advancements in System level IEC qualification test methods like Air-discharge tests, Development challenges related to off-chip protection elements with ultra-low capacitances.

10. ESD and EOS Protection in GaN HEMTs & GaN Power ICs

GaN technology based ESD protection diodes, TVS, testing and shielding techniques, EOS protection from overvoltage conditions, current surges and power supply instability.